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| Application No. | Application Title | Issue Date |
| 20080299757 | Wafer structure and method for fabricating the same A wafer structure and a method for fabricating the same are provided. First, a wafer having a pad and a first protection layer with a first opening is provided. Next, a second protection layer with a second opening is formed on the first protection layer. Part of the pa... | 12/04/2008 |
| 20080290489 | Package structure and electronic device using the same A package structure and an electronic device using the same are provided. The package structure includes a chip module and a cover. The chip module covered by the cover is used for receiving a first signal. The chip module includes a substrate, a heat sink and a first c... | 11/27/2008 |
| 20080283984 | Package structure and manufacturing method thereof A package structure and a manufacturing method thereof are provided. The package structure includes a leadframe, a die, a solder layer and several connecting components. The leadframe includes a heat dissipation pad and several leads. The heat dissipation pad is dispose... | 11/20/2008 |
| 20080271915 | METHOD FOR MAKING A CIRCUIT BOARD AND MULTI-LAYER SUBSTRATE WITH PLATED THROUGH HOLES A method for making a circuit board includes the following steps. At least two substrates are provided, wherein each substrate includes two surfaces, two circuit layers respective formed on the two surfaces and at least a via passing through the two surfaces. A metal la... | 11/06/2008 |
| 20080272486 | CHIP PACKAGE STRUCTURE A chip package structure includes a carrier, an interposer, a plurality of electrically conductive elements, a first sealant, a chip, and a second sealant. The interposer is disposed on the carrier. The electrically conductive elements electrically connect the interpose... | 11/06/2008 |
| 20080261351 | WAFER SAWING METHOD A wafer sawing method for sawing a wafer by using a cutting tool is provided. Sawing paths are formed on a surface of the wafer. In the wafer sawing method, a carrier on which strip-shaped adhesives or at least a fiducial mark is formed is firstly provided. The dimensio... | 10/23/2008 |
| 20080252300 | Detecting device A detecting device for detecting the electrical connection between several first pads and second pads of a package substrate is provided. The first and the second pads are disposed on two opposite sides of the package substrate. The detecting device includes a socket un... | 10/16/2008 |
| 20080247149 | CHIP PACKAGE STRUCTURE A chip package structure including a carrier, a chip, and an underfill layer is disclosed. The carrier has a number of bumps disposed thereon. The chip has an active surface. The chip is flip-chip bonded and electrically connected to the carrier through the bumps such t... | 10/09/2008 |
| 20080230895 | SEMICONDUCTOR PACKAGE AND THE METHOD FOR MANUFACTURING THE SAME A method for manufacturing semiconductor packages is provided. The upper surface of a substrate has a plurality of slots and surface mount devices are positioned across the slots. In this circumstance, the space below the surface mount devices can be filled up with seal... | 09/25/2008 |
| 20080230887 | SEMICONDUCTOR PACKAGE AND THE METHOD OF MAKING THE SAME The present invention relates to semiconductor package and the method of making the same. The method of the invention comprises the following steps: (a) providing a first substrate; (b) mounting a first chip onto a surface of the first substrate; (c) forming a plurality... | 09/25/2008 |
| 20080230885 | CHIP HERMETIC PACKAGE DEVICE AND METHOD FOR PRODUCING THE SAME A chip hermetic package device includes a substrate, a chip, a hermetic lid, a hermetic material and a post. The height of the post is larger than the thickness of the hermetic material. A method for producing a chip hermetic package includes the steps of: mounting the ... | 09/25/2008 |
| 20080232077 | CONVERSION SUBSTRATE FOR A LEADFRAME AND THE METHOD FOR MAKING THE SAME The present invention relates to a conversion substrate for a leadframe and the method for making the same. The conversion substrate comprises a core layer, a first copper layer, a first metal plating layer and a first brown/black oxide layer. The first copper layer is ... | 09/25/2008 |
| 20080224294 | MULTI-CHIP PACKAGE WITH A SINGLE DIE PAD A multi-chip package with a single die pad is provided. The multi-chip package includes a leadframe having a die pad and a plurality of leads surrounding the die pad. Each of the leads includes an upper lead, a lower lead and an intermediate lead substantially perpendic... | 09/18/2008 |
| 20080218981 | PACKAGE STRUCTURE FOR CONNECTION WITH OUTPUT/INPUT MODULE A package structure for connection with an output/input module is disclosed. The package structure can be applied to conventional multi-chip packages and system in packages. The package structure defines at least one insertion cavity that is vertically or horizontally d... | 09/11/2008 |
| 20080217758 | PACKAGE SUBSTRATE STRIP, METAL SURFACE TREATMENT METHOD THEREOF AND CHIP PACKAGE STRUCTURE A package substrate strip having a reserved plating bar and a metal surface treatment method thereof are provided. The metal surface treatment method forms a conductive layer connecting the reserved plating bar and bonding pads of the package substrate stripe and furthe... | 09/11/2008 |
| 20080211107 | Via hole structure and manufacturing method thereof A via hole structure and a manufacturing method thereof are provided. The via hole structure is disposed on a substrate. The substrate has a through hole, which passes through the substrate from a top surface to a bottom surface. The via hole structure comprises a condu... | 09/04/2008 |
| 20080191329 | SEMICONDUCTOR PACKAGE The present invention relates to a semiconductor package, comprising a carrier, a semiconductor device, a first wire and a second wire. The carrier has a first electrically connecting portion and a second electrically connecting portion. The semiconductor device has a p... | 08/14/2008 |
| 20080191330 | STACKED SEMICONDUCTOR PACKAGE The present invention relates to a stacked semiconductor package, comprising a carrier, a first semiconductor device, a second semiconductor device, a plurality of first wires and a plurality of second wires. The carrier has a plurality of electrically connecting portio... | 08/14/2008 |
| 20080191362 | SEMICONDUCTOR PACKAGE HAVING IMPEDANCE MATCHING DEVICE A semiconductor package having an impedance matching device is disclosed, which is especially applicable to conventional system-in-package structures and system packaging design with high-density I/O design. The impedance matching device achieves impedance matching betw... | 08/14/2008 |
| 20080188026 | METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE STRUCTURE HAVING MICRO-ELECTRO-MECHANICAL SYSTEMS The present invention relates to a method for manufacturing a semiconductor package structure having Micro-Electro-Mechanical Systems (MEMS). A plurality of Micro-Electro-Mechanical Systems is disposed on a plurality of substrate units of a substrate, and a plurality of... | 08/07/2008 |
| 20080185707 | SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME A semiconductor package structure comprises a chip, a plurality of pad extension traces, a plurality of via holes, a lid and a plurality of metal traces, wherein the chip has an optical component and a plurality of pads disposed on its active surface; pad extension trac... | 08/07/2008 |
| 20080185706 | PACKAGE AND METHOD FOR MAKING THE SAME The present invention relates to a package and a method for making the same. The package includes a substrate, a semiconductor element, and an underfill. The semiconductor element has a first surface. A plurality of bumps and at least one ring structure are disposed on ... | 08/07/2008 |
| 20080185698 | SEMICONDUCTOR PACKAGE STRUCTURE AND CARRIER STRUCTURE A semiconductor package structure is disclosed. The structure comprises a die pad, a chip, leads, a recess, and an encapsulant. The chip is disposed on the die pad. The leads are disposed on a periphery of the die pad and electrically connected to the chip. The recess i... | 08/07/2008 |
| 20080180930 | EMBEDDED ELECTRONIC COMPONENT STRUCTURE AND FABRICATION METHOD THEREOF An embedded electronic component structure and a method for forming the same are provided, wherein the embedded electronic component structure comprises a lower laminating layer, a first clamping layer, a dielectric layer, a second clamping layer, an electronic componen... | 07/31/2008 |
| 20080180878 | PACKAGE STRUCTURE WITH EMBEDDED CAPACITOR, FABRICATING PROCESS THEREOF AND APPLICATIONS OF THE SAME A package structure with an embedded capacitor, a fabricating process thereof and applications of the same are provided, wherein the package structure includes a dielectric layer, a first conductive layer, a second conductive layer, a first embedded plate and a second e... | 07/31/2008 |
| 20080179740 | PACKAGE SUBSTRATE, METHOD OF FABRICATING THE SAME AND CHIP PACKAGE A package substrate, including a base layer, a surface circuit layer, a plurality of conductive bumps, and a patterned solder mask layer, is provided. The surface circuit layer having a plurality of bonding pads is disposed on a surface of the base layer. The conductive... | 07/31/2008 |
| 20080179739 | FLIP CHIP PACKAGE WITH ANTI-FLOATING STRUCTURE A flip chip package with an anti-floating structure includes a leadframe, a flip chip, and a plurality of solders. The leadframe includes a plurality of leads and a fastening part. At least one locking hole is formed on an upper surface of the fastening part. The flip c... | 07/31/2008 |
| 20080178464 | METHOD FOR FABRICATING CIRCUIT BOARD A method for fabricating a circuit board comprises following steps. First, a metal substrate is provided and an electrophoretic deposition procedure is performed thereon to form an insulation film on a surface of the metal substrate. Next, a plurality of holes is formed... | 07/31/2008 |
| 20080179717 | SEMICONDUCTOR PACKAGE WITH ELECTROMAGNETIC SHIELD A semiconductor package with an electromagnetic shield is disclosed. The semiconductor package includes two substrates (102, 202; 103, 203) and an electromagnetic shield (101, 201). Each substrate has at least one die (108, 208; 112, 212) provided t... | 07/31/2008 |
| 20080176360 | METHOD FOR SAWING A WAFER AND METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE BY USING A MULTIPLE TAPE A method for sawing a wafer includes the following steps. A wafer which has an active surface, a back surface and a plurality of longitudinal and transverse sawing lines is provided, wherein the sawing lines are located on the active surface so as to define a plurality ... | 07/24/2008 |
| 20080169573 | CIRCUIT SUBSTRATE AND THE SEMICONDUCTOR PACKAGE HAVING THE SAME The present invention relates to a circuit substrate comprising an upper surface, a first layout area, a second layout area, and a third layout area. The first layout area is on the upper surface, and has a plurality of first electrical contacts. The second layout area ... | 07/17/2008 |
| 20080164595 | STACKABLE SEMICONDUCTOR PACKAGE AND THE METHOD FOR MAKING THE SAME The present invention relates to a stackable semiconductor package and the method for making the same. The stackable semiconductor package comprises a first substrate, a semiconductor device, a plurality of stud bumps, a plurality of first wires, a second substrate, and... | 07/10/2008 |
| 20080164562 | SUBSTRATE WITH EMBEDDED PASSIVE ELEMENT AND METHODS FOR MANUFACTURING THE SAME A substrate with an embedded passive element and methods for manufacturing the same are provided, wherein the substrate includes an interlayer circuit board having a first conductive circuit, a dielectric layer, a first electrode, a second electrode, and a second conduc... | 07/10/2008 |
| 20080157406 | Recyclable stamp device and recyclable stamp process for wafer bond A recyclable stamp device and a recyclable stamp process for wafer bond are provided. The recyclable stamp device includes a substrate, a protective layer, a stack film structure and a cap. The protective layer is disposed on the substrate. An opening is positioned at t... | 07/03/2008 |
| 20080155819 | CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME A method for manufacturing a circuit board includes the steps of: forming a first wiring layer on a substrate; forming an insulating layer on the surface of the first wiring layer by means of electrophoretic deposition; forming a second wiring layer on the insulating la... | 07/03/2008 |
| 20080158836 | CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME A method for manufacturing a circuit board includes the steps of: forming a first wiring layer on a substrate; forming an insulating layer on the surface of the first wiring layer by means of electrophoretic deposition; forming a second wiring layer on the insulating la... | 07/03/2008 |
| 20080158844 | STACKED TYPE CHIP PACKAGE STRUCTURE A stacked type chip package structure including a backplate, a circuit substrate, a first chip, a second chip, and a conductive film is provided. The backplate comprises a circuit layer. The circuit substrate is disposed on the backplate, and has an upper surface and an... | 07/03/2008 |
| 20080157305 | CHIP PACKAGE STRUCTURE A chip package structure including a circuit board, a solder mask, and a chip package is provided. The circuit board has at least one contact on its surface. The solder mask covers the circuit board and has at least one first opening for exposing the contact. The chip p... | 07/03/2008 |
| 20080150098 | Multi-chip package A multi-chip package including a carrier, a first chip, a second chip and a first conductive layer is provided. The first chip is disposed on the carrier and is electrically connected to the carrier through at least one first wire. The second chip is disposed on the fir... | 06/26/2008 |
| 20080142254 | CARRIER AND MANUFACTURING PROCESS THEREOF A manufacturing process of a carrier is disclosed. First, a first substrate is provided. A circuit layer having a number of contacts is formed on a surface of the first substrate. Then, a solder mask is formed on the circuit layer and exposes the contacts. Next, a secon... | 06/19/2008 |
