Abstract text

The invention describes a power amplifier comprising a first transistor (M_HS) having a first control terminal and a first main current path coupled between a first supply terminal (Vdd) and a first node (VH), a second transistor (M_LS) having a second control terminal and a second main current path coupled between a second supply terminal (Vss) and a second node (V_L), a first controlled resistor (M_HC) coupled between the first node and an output node (Vout) of the amplifier, a second controlled resistor (M_LC) coupled between the second node and the output node (Vout) of the amplifier, the first transistor being controlled by a first driver comprising a level shifting circuit, and the second transistor being controlled by a second driver including a time delaying circuit.