InventorAssigneeUS Class330/296Including particular biasing arrangementAttorney, Agent or FirmForeign DocumentsInternational Class H03F 3/04 Issued Patent Number:8004365
Abstract textThe invention relates to a circuit arrangement ( 30, 40, 70, 80, 90) of a low-noise linear input amplifier comprising a parallel circuit of a common-base circuit ( 20) and a common-emitter circuit ( 30), the emitters of two first transistors (Q 3, Q 4) are interlinked and the bases of two second transistors (Q 1, Q 2) are intercoupled, the collectors are interconnected in parallel with the output, and the source voltage (VG) is interlinked with the emitters of the second transistors (Q 1, Q 2) and with the bases of the first transistors (Q3, Q4), in which a linearization of the output current (OUTLNA 1,2) as a function of the source voltage (VG) is achieved by a linearization of the transfer function, such as the tangential hyperbolic function, of the first and second transistors (Q 1, Q 2, Q 3, Q 4). |