Abstract text

A power amplification device includes a BTL amplification circuit including a first amplification circuit and a second amplification circuit, the first amplification circuit including a first output transistor, a first power detection circuit, a second output transistor, and a second power detection circuit, the second amplification circuit including a third output transistor, a third power detection circuit, a fourth output transistor, and a fourth power detection circuit, a first comparator which compares output values of the first and fourth power detection circuits, and a second comparator which compares output values of the second and third power detection circuits.